Efficient sparse matrix-vector multiplication on cache-based GPUs
Sparse matrix-vector multiplication is an integral part of many scientific algorithms. Several studies have shown that it is a bandwidth-limited operation on current hardware. On cache-based architectures the main factors that influence performance are spatial locality in accessing the matrix, and t...
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| Format: | Book part |
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IEEE Communications Society
Piscataway (NJ)
2012
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| Series: | Innovative Parallel Computing (InPar), 2012
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| Subjects: | |
| mtmt: | 2724105 |
| Online Access: | https://publikacio.ppke.hu/1901 |
| Summary: | Sparse matrix-vector multiplication is an integral part of many scientific algorithms. Several studies have shown that it is a bandwidth-limited operation on current hardware. On cache-based architectures the main factors that influence performance are spatial locality in accessing the matrix, and temporal locality in re-using the elements of the vector. © 2012 IEEE. |
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| Physical Description: | 12 1-12 |
| ISBN: | 9781467326322 |